Field of the Invention
This invention relates generally to digital memory apparatus and more particularly to a low power semiconductor memory suitable for fabrication by large scale integrated circuit techniques.
The continuing evolution in integrated circuit technology has progressed to the point of making it feasible to fabricate active memory circuits, as for example the type disclosed in U.S. patent application Ser. No. 455,546, filed May 13, 1965 (now Pat. No. 3,447,137) by Robert Feuer and assigned to the same assignee as the present application, by large scale integration techniques. Integrated memories are presently being developed with various degrees of emphasis on those characteristics which make them competitive with the more conventional forms of memories. Advantages offered by integrated circuit memories include high speed, miniaturization, low power, nondestructive readout, and reduced peripheral complexity in small scale memories. A noteworthy disadvantage of active circuit memories, of course, is their volatility.
The present invention is directed to a digital memory employing active nondestructive readout memory cells and organized in a manner particularly suiting the memory to fabrication by large scale integration techniques on a monolithic chip.